Department of Electrical and
Computer Engineering, University of Utah
Office: MEB 2126
Merrill Engineering Building (MEB), Room 2126 Univerisity of Utah Salt Lake City, UT, 84112
Cunxi is a tenure-track Assistant Professor in the ECE Department at the University of Utah. Cunxi was a PostDoc Cornell University with Prof. Zhiru Zhang in 2018-2019, and was a
PostDoc at Integrated Systems Laboratory (LSI) at EPFL, Lausanne, Switzerland, with Prof. Giovanni De Micheli in 2017-2018. He received Ph.D. degree from University of Massachusetts Amherst (UMass Amherst) in 2017, under the supervision of
Prof. Maciej Ciesielski. His research interests
focus on formal methods, electronic design automation, applied machine learning, formal verification, and hardware
security. Cunxi spent 11 months as a research intern at IBM T.J Watson Research
Center in 2015 and 2016. His work received the best paper nominations at ASP-DAC (2017), TCAD Best paper nomination
(2018), and won the 1st place at DAC Security Contest (2017). Cunxi was nominated for ACM Outstanding Ph.D dissertation award by UMass.
End-to-End Industrial Study of Retiming Cunxi Yu, Chau-Chin Huang, Gi-Joon Nam, Mihir Choudhury, Victor N. Kravets, Andrew Sullivan, Maciej Ciesielski, Giovanni De Micheli
2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'18)
Automatic Word-level Abstraction on Datapaths. Cunxi Yu and Maciej Ciesielski IEEE International Symposium on Circuits and System (ISCAS'16) IEEE, May 2016, Montreal, Canada.
Oracle-Guided Incremental SAT Solving to Reverse Engineer Camouflaged Logic Circuits. Duo Liu, Cunxi Yu and Daniel Holcomb IEEE/ACM/EDAA Design, Automation and Test in Europe (DATE'16), March 2016, Dresden, Germany.
Logic Debugging of Arithmetic Circuits. Samaneh Ghandali, Cunxi Yu, Duo Liu, Maciej Ciesielski 2015 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'15) , July 2015, Montpellier, France.
Verification of Arithmetic Datapath Designs using Word-level Approach. Cunxi Yu, Walter. Brown and Maciej. Ciesielski 2015 IEEE International Symposium on Circuits and Systems (ISCAS). May 2015, Lisbon,Portugal.
Verification of Gate-level Arithmetic Circuits by Function Extraction[Tools + Benchmarks] Maciej Ciesielski, Cunxi Yu, Walter Brown, Duo Liu and Andre Rossi IEEE/ACM 52nd Design Automation Conference (DAC). June, 2015, San Francisco, CA, USA.
Diagnosis and Debugging of Arithmetic Circuits Samaneh Ghandali, Cunxi Yu, Duo Liu, Maciej Ciesielski IEEE/ACM 52nd Design Automation Conference (DAC-WIP). June, 2015, San Francisco, CA, USA.
Verification of Sequential Arithmetic Circuit. Cunxi Yu, Duo Liu, Walter Brown, Samaneh Ghandali, Maciej Ciesielski IEEE/ACM 52nd Design Automation Conference (DAC-WIP). June, 2015, San Francisco, CA, USA.
Teaching Assistant, ECE 667 (Grad) - Synthesis and Verification of Digital Systems (Spring 2016), UMass Amherst.